39 lines
1.2 KiB
Plaintext
39 lines
1.2 KiB
Plaintext
[INFO]
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Name = Intel i850E North bridge
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42 = DQS Output, Timing Control Register
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48 = Clock Crossing Register
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4E = DRAM Clocks Control Register
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51 = AGP Miscellaneous Configuration Register
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52 = Graphics Control Register
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60 = DRAM Row 0 Boundary Register
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61 = DRAM Row 1 Boundary Register
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62 = DRAM Row 2 Boundary Register
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63 = DRAM Row 3 Boundary Register
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70 = DRAM Row 0/1 Attribute Register
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71 = DRAM Row 2/3 Attribute Register
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78 = DRAM Timing Register
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7C = DRAM Controller Mode Register
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88 = DRAM secondary control Register
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90 = Programmable Attributes Map 0
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91 = Programmable Attributes Map 1
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92 = Programmable Attributes Map 2
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93 = Programmable Attributes Map 3
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94 = Programmable Attributes Map 4
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95 = Programmable Attributes Map 5
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96 = Programmable Attributes Map 6
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97 = Fixed DRAM Hole Control Register
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9D = System Management RAM Control Register
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9E = Extended System Management RAM Control
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A8 = AGP Command
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B0 = AGP Control Register
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B4 = Aperture Size
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B8 = Aperture Translation Table
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BC = AGP Interface Multi-Transaction Timer Register
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BD = AGP Low Priority Transaction Timer Register
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C6 = GMCH Configuration
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C8 = Error Status
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CA = Error Command
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CC = SMI Command Register
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CE = SCI Command Register
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DE = Scratchpad Data Register
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